Bug de l'i850

CNet  vient d’apporter quelques précisions concernant le retard du Pentium 4. En fait, il ne s’agit pas d’un problème provenant du processeur à proprement parlé, mais de son chipset compagnon, l’i850. Ce dernier, dans sa dernière révision, posait en effet quelques problèmes lorsque l’on utilisait des cartes graphiques au format PCI. Ce bug est à l’origine du décalage de la sortie du Pentium 4 de 3 semaines, le temps d’effectuer de nouveaux tests sur une nouvelle version de l’i850 corrigeant ce problème. A titre d'information, voici une partie d'un document officiel d'Intel sur le sujet publiée sur Digit Life  :

Intel Pentium 4 processor launch has been retargeted to WW48

Intel Pentium 4 processor development on track
- Hardware validation on track, looking good

A PCI interoperability issue has been identified with the Intel 850 chipset
- Failures have been seen with certain PCI graphics cards
- This issue will be classified as an ICH2 erratum (only manifests itself with 850 MCH)

The issue is completely understood and has been root caused
- Due to interaction between the 850 MCH and ICH2
- Fix validated with FIB'd ICH2
- Intel will implement a low risk stepping to the ICH2
- New Stepping is B1' (B1 prime)
- B1' samples expected to be avail WW42 and updated production commits WW41
- B1' stepping will not require any motherboard or BIOS changes
- Customers should continue validation efforts with the current ICH2 B1 step
- Customers encouraged to perform targeted regression testing on ICH2 B1'

Does not affect Intel Pentium III processor based systems (with 810E, 815E, 820E)

850/860 chipset erratum identified
- During PCI memory read line or memory read multiple commands, the ICH2 will pre-fetch data from memory and may not invalidate the pre-fetched data(if required), thus allowing invalid data to be delivered to a PCI master
- Issue only occurs in 850/860 chipset based systems due to the unique architectural interactions between the MCH and the ICH2

Silicon fix to tie an existing logic signal in the ICH2 to the buffer invalidate logic
- Minor metal layer fix